ベリシリコン株式会社 の製品・IP一覧

1、2行で結構ですので“理想的な仕様”をお出しください。それをChipにして納入させていただきます。

ベンダー公式

VIP (Vison Image Processing) - VIP series

2018/04/10

Machine vision is becoming a critical need in many automotive, industrial, medical, security and even retail markets. VeriSilicon's Vision IP (VIP) solution is one of the first licensable vision engines to achieve OpenVX 1.0 conformance as a dedicated vision processing block. With Algorithm-Level Programmability? VIP allows for easy and rapid development of programmable applications approaching fixed function performance and efficiency. It is extremely fast and consumes less power. It is perfect for adaptable mass-market applications as well as for high-end solutions in automotive ADAS systems that require object identification, pattern recognition and similar vision related features.

  • MW
  • Drv
  • OS
  • FPGA
  • ASIC
  • HW M
  • 評ボ
  • 評環
  • 開環

ベンダー公式

SiP(システム イン パッケージ)ターンキー・サービス

2018/04/10

ベリシリコンは最新の SiP (システム・イン・パッケージ)のアセンブリ技術、テスト手法、を提供することができ、SiPのEcoシステムを実現することができます。より小さなフォームファクタ、他社より秀でた性能や低消費電力を実現し、市場実現性を早め、お客様のシステムを他社より大幅に差別化するものとなります。

  • MW
  • Drv
  • OS
  • FPGA
  • ASIC
  • HW M
  • 評ボ
  • 評環
  • 開環

ベンダー公式

SoC ターンキー・ソリューション

2018/04/10

・SoCの仕様策定、設計から試作・量産までトータルで請負設計します。
・最適なファウンドリー、パッケージベンダー、テストハウスを選択、提案。
・システムプロトタイプ、SoCプラットフォーム、ソフトウェアも提供。

  • MW
  • Drv
  • OS
  • FPGA
  • ASIC
  • HW M
  • 評ボ
  • 評環
  • 開環

ベンダー公式

Mixed Signal IPs lineup

2017/03/13

VeriSilicon's mixed signal IP portfolio consists of over 1000 functional “building blocks” specifically designed for most of industry’s popular process technology, ranging from 0.18um to 28nm. These SIP (semiconductor IP) blocks offer ease of integration and verification – providing reliability, risk reduction and time-to-market advantages in the development of complex SoCs and ASICs. Silicon proven and production proven are key indicators of IP quality that demonstrates VeriSilicon’s commitment to customer success.

  • MW
  • Drv
  • OS
  • FPGA
  • ASIC
  • HW M
  • 評ボ
  • 評環
  • 開環

ベンダー公式

DC (Display Controller) - DC series

2017/03/13

VeriSilicon's display controller has been deployed in various product segments like wearables, high end surveillance cameras, TV processors, and automotive application processors. The flexible display interfaces, such as MIPI DBI (Type A, B, C) and SPI provides the power-efficient interface from display controller to display panel. The built-in pixel processing engine is both versatile and configurable, including scaling, blending, rotation, color conversion, dither and more. It provides system flexibility, lower bandwidth and lower power given less trips to and from DDR. The embedded decompress or module will consume directly the compressed data produced by VeriSilicon’s IPs as well as third-party IPs. This delivers even lower bandwidth and power.
The DCNano display controller is driven by the wearable products, which demand for the lowest power and most compact silicon footprint. The DC8000 display controller is developed for complex SoC driving 4K2K display, which constantly operate on extreme low bandwidth condition. Each Display Controller IP is built from proven efficient pixel processing technology scalable to cover wide range of applications.
<DCNano>
Extreme compact in silicon area, extreme low power for wearable and MCU, scalable up-to 1080p.
<DC8000>
High performance, addressing 4K and 8K products, with built-in rich set of capabilities such as composition, scaling, rotation to lower the overall system bandwidth.

  • MW
  • Drv
  • OS
  • FPGA
  • ASIC
  • HW M
  • 評ボ
  • 評環
  • 開環